Broadband high-q antenna system

ABSTRACT

THE BROADBAND HIGH-Q ANTENNA SYSTEM EMPLOYS A FEED FORWARD CIRCUIT IN COMBINATION WITH A FEEDBACK CIRCUIT TO TUNE A HIGH-Q ANTENNA IN ACCORDANCE WITH THE INSTANTANEOUS FREQUENCY OF A TRANSMITTED SIGNAL. THE FEED FORWARD CIRCUIT CHANGES THE REACTANCE OF THE ANTENNA IN RE SPONSE TO A CONTROL SIGNAL FROM A TRANSLMITTER WHILE THE FEEDBACK CIRCUIT INSURES THAT THE PASSBAND OF THE HIGH-Q ANTENNA IS CENTERED ABOUT THE TRANSMITTER FREQUENCY.

Feb. 23, 1 971 P. JOHANNESSEN' BROADBAND HIGH-Q ANTENNA SYSTEM 4Sheets-Sheet 4 Filed Jupev v, 1968 I H w @E w R u m v M mm o M om V I INAGENT United States Patent O 3,566,273 BROADBAND HIGH-Q ANTENNA SYSTEMPaul R. Johannessen, 40 Tyler Road, Lexington, Mass. 02173 Filed June 7,1968, Ser. No. 735,333 Int. Cl. H04b 7/100 US. Cl. 325-173 4 ClaimsABSTRACT OF THE DISCLOSURE The broadband high-Q antenna system employs afeed forward circuit in combination with a feedback circuit to tune ahigh-Q antenna in accordance with the instantaneous frequency of atransmitted signal. The feed forward circuit changes the reactance ofthe antenna in response to a control signal from a transmitter while thefeedback circuit insures that the passband of the high-Q antenna iscentered about the transmitter frequency.

BACKGROUND OF THE INVENTION (1" his invention relates to antennasystems, in particular to a broadband high-Q antenna system useful in asystem for transmitting frequency shift keying (FSK) and phase shiftkeying (PSK) data at a signaling rate higher than the antenna bandwidth.

The bandwidth and transmission speeds over radio communication channelsare presently limited by the high-Q antenna system used. As is wellknown, if the bandwidth of a transmitted signal is considerably greaterthan the antenna bandwidth, the output transmitted power is greatlyreduced. However, if the antenna is tuned in accordance with theinstantaneous frequency of the transmitted signal, no reduction inradiated power occurs. This tuning is known as synchronous tuning.Basically, there are two methods of achieving synchronous tuning. Thefirst method is to switch a reactance into the antenna circuit. Thisinstantaneously changes the resonance frequency of the antenna. To avoidgeneration of spurious frequency components, the switching must occur atthe proper instants of time. The second method of synchro nous tuning isto use a nonlinear reactance element (capacitor or inductor) in theantenna circuit. Since the resonance frequency depends on the averagereactance of the nonlinear element, which, in turn, can be made to varyby means of a control signal, continuous tuning of the antenna resonancefrequency can be achieved.

For the first method, highly efficient switching techniques have beenproposed. These techniques make it quite possible to switchinstantaneously from one frequency to another so that a maximum datarate equal to half the transmitter frequency is possible. This highswitching speed, however, may be a disadvantage if the desired data rateis much less than the maximum data rate achievable. Since fast switchingtends to produce a square-wave, frequency-modulated waveform, a widefrequency spectrum is generated. This wide frequency spectrum isundesirable because of interchannel interference. Furthermore, asquare-wave modulated waveform does not enhance the signal detectabilityof any significance beyond that of a sinusoidal modulated waveform. Ingeneral, therefore, it may be concluded that fast switching isundesirable for almost all VLF communication systems. Another reason formaking this method of synchronous tuning impractical is the very highpower rating required of the switch.

The nonlinear reactance system permits continuous transitions from onefrequency to another. Thus, transitions that generate the minimumamounts of unwanted sidebands can be implemented. The main disadvantageof lllt this system is the generation of harmonics of the transmitterfrequency. For a high-Q antenna system, these harmonics may besufficiently small so that they do not cause any serious interferenceproblem. However, the use of a balanced nonlinear reactance circuitmakes possible cancellation of these harmonics. While the nonlinearreactance system requires a large control power, the controlling elementis reactive, and the real part of the control power required dependsonly upon the losses in the control circuit. A broadband high-Q antennasystem according to the present invention employs a highly efficientswitching circuit to change the average reactance.

SUMMARY OF THE INVENTION Briefly, the system according to the presentinvention employs, in combination, a feedback circuit and a feed forwardcircuit to tune the antenna in accordance with the instantaneousfrequency of an information signal. The antenna circuit includes tworeactance means, one of which is connected to the feed forward circuitand the other of which is connected to the feedback loop. In response toa transmitter trigger signal, which indicates that the frequency (orphase) of the information signal, typically an RF signal, is about tochange, the feed forward circuit changes the value of its associatedreactance in the antenna circuit, thus tuning the antenna to the newfrequency. The feedback loop then senses the phase difference betweenthe antenna current and the RF transmitter signal and generates acontrol signal which varies the reactance of the second reactanceelement to fine tune the high-Q antenna to the center frequency of theRF transmitter signal.

DESCRIPTION OF THE DRAWINGS The construction and operation of theantenna system according to the invention will be more fully understoodfrom the following detailed description taken in conjunction with theaccompanying drawings in which:

FIG. 1 is a block diagram of an embodiment of the invention;

FIG. 2 is a more detailed diagram of the embodiment of FIG. 1;

FIG. 3 is a schematic representation of one species of a switchingcircuit employed in the embodiment shown in FIG. 2;

FIG. 4 is a representation of voltage and current waveshapes useful inexplaining the operation of the switching circuit of FIG. 3;

FIG. 5 is a schematic represenation of a second species of a switchingcircuit which may be employed in the embodiment shown in FIG. 2;

FIG. 6 is a representation of voltage and current waveshapes useful inexplaining the operation of the switching circuit of FIG. 5;

FIG. 7 is a schematic representation of a logic unit employed in theembodiment of FIG. 2; and

FIG. 8 is a representation of voltage and current waveshapes useful inexplaining the operation of the logic unit of FIG. 7.

DETAILED DESCRIPTION Referring to FIG. 1; a radio frequency (RF) outputsignal on line 10 of a transmitter 12, typically an FSK or PSK type, isdirected to both a high Q antennna 14 and to a feedback circuit 16. Line18 connects an input signal from the antenna 14 to the feedback circuit16. The output signal of the feedback circuit 16 in turn is connected tothe antenna 14 via line 20. A trigger signal from the transmitter 12 isconnected via line 24 to a feed forward circuit 22, the output of whichis connected to the antenna 14.

In operation, the RF output signal from the transmitter 12 is directedsimultaneously to the antenna 14 and to the feedback cricuit 16. Asample of the resultant signal, established in the antenna 14 by thetransmitter 12, is directed to the feedback circuit 16 via line 18. Thesample is compared to the RF transmitter output signal and an errorsignal is generated when there is phase difference between the twosignals. The error signal thus generated is directed via line 20 to varya reactance element of the antenna such that the Q of the antenna iscentered about the frequency of the RF output signal of the transmitter12.

In an FSK system, when a change in the frequency of the transmitteroutput signal occurs (or in a PSK system, a change in phase), a triggersignal is directed to the feed forward circuit 22 from the transmitter12 via line 24. In response to the trigger signal, the feed forwardcircuit 22 generates a signal which changes a second reactance elementof the antenna 14 such that the center frequency of the antenna isapproximately centered about the center frequency of the transmitter RFoutput signal. The feedback circuit 16 then functions to insure trackingbetween the antenna center frequency and the transmitted signal and tocompensate for small changes and unbalanced conditions in the antenna 14and feed forward circuitry 22.

FIG. 2 is a more detailed diagram of the embodiment shown in FIG. 1. Thefeedback circuit 16 includes a phase detector 30, typically a standardZero-crossing phase detector, having a first input connection to thetransmitter 12 via line 10 and a second input connection to the antenna14 via line 18. The output of the phase detector 30 is connected to apower amplifier 32, the output signal of which is connected to thecontrol side of a reactance element L typically two series connectedsaturable reactors, each having an output winding and a control winding.

The feed forward circuit 22 includes a logic circuit 34, to be discussedhereinafter, which receives a trigger input signal via line 24 from thetransmitter 12. The output signal of the logic unit 34 is connected to aswitching circuit 35, also to be discussed in detail hereinafter, theoutput signal of which is connected to the control side of a secondreactance element L typically two series connected saturable reactors.

A typical circuit for the antenna 14 includes the tuning inductor Lwhich is connected in series with the antenna represented by a capacitorC resistor R the output windings of the saturable reactors L and L andresistance R The common junction of resistance R and saturable reactorsL is connected to the phase detector 30 by line 18. The transmitter 1 2is connected to the antenna 14 via a tap on the inductor L In operation,a trigger signal is directed from transmitter 12 to logic unit 34 vialine 24 when a change in the transmitter frequency in an FSK system orwhen a change in phase in a PSK system occurs. In response to thetrigger signal, the logic unit 34 generates and directs a sequence ofsignals to the switching circuit 36 which in turn performs the actualchange in the average reactance of the saturable reactor L The phasedetector 30 compares the phase of transmitter output voltage to thephase of the antenna current and generates a DO. error signalproportional to the phase difference between the two signals. This D.C.error signal is then amplified by the power amplifier 32 and directed tothe control windings of the saturable reactor L to adjust the inductanceL in such a direction as to eliminate the phase difference between thetransmitter signal and the antenna current, thus insuring that thepassband of the antenna 14 is centered about the transmitted frequency.

FIGS. 3 and 5 are schematic representations of switching circuits whichmay be employed in the system of FIG. 2. The particular species ofswitching ciruit shown in FIG. 3 is employed in an FSK system while thatof FIG. 5 is employed in a PSK system. Referring to FIG. 3, a first lowvoltage power supply 40 is connected in parallel with a seriescombination of a switch S typically a relay or semiconductor gatecontrolled by a control signal from logic unit 34, and an inductor L Acapacitor C is connected in parallel with the inductor L and with theseries combination of a switch S and a capacitor C Connected in parallelwith capacitor C is the control winding of the antenna saturable reactorL and the series combination of a switch S and a second low voltagepower supply 42.

The waveshapes shown in FIG. 4 will be employed to explain the operationof the switching circuit of FIG. 3. Initially, switch S is closed andswitches S and S are open and theantenna is tuned to a frequencydesignated as f The current i flows through the inductor L and is givenby the expression where V is the voltage of the low voltage power supply40 and R is the internal resistance of the inductor L When a change infrequency occurs, for example, changing from frequency f to f a controlsignal is generated in the logic unit 34 which opens switch S and closesswitch S The time occurrence of this event is indicated as t in FIG. 4.When the capacitor voltage approaches zero at time 2 the current i ininductor L is completely transferred to saturable reactor as current iand thereby changing the inductance in the antenna circuit from a highvalue to a low value. Thus, the antenna is tuned to the instantaneousfrequency of the transmitter RF output signal.

Just prior to t when the capacitor voltage is equal to the supplyvoltage, V, a control signal is generated in logic unit 34 that opensswitch S and closes switch S connecting power supply 42 to the circuit.If the switching circuit were lossless, two power supplies would not berequired. However, since transfer of all of the current i, in inductor Lto saturable inductor L is not possible because of the PR loss, a secondpower supply 42 is switched into the circuit by closure of switch S Notethat all the elements in the switching circuit are reactive and,therefore, the power supplies need only supply the relatively smallamount of power dissipated in the internal resistance of the circuitcomponents.

The time required to effectuate a transfer between frequency f and f isT=iO1=2\ tu+L2)(03.4032) (2) so that the maximum data rate becomes Theswitching circuit of FIG. 3 is symmetrical so that when a frequencychange from and 1, occurs the sequence of the switching operation isreversed.

A species of the switching circuit which can be employed in a PSK systemis shown in FIG. 5. A high voltage power supply 58 is connected to aseries combination of a switch S and a capacitor C Connected in parallelwith capacitor C is a series combination of a switch S the controlwindings of the antenna saturable reactor L and a capacitor C Connectedin parallel with capacitor C is a series combination of a switch S and asecond high voltage power supply 64.

The voltage and current waveshapes of FIG. 6 will be used to explain theoperation of the switching circuit of FIG. 5. Initially, the switches Sand S are open and S is closed, impressing the voltage V of the highvoltage supply 58 across capacitor C At time t control signals fromlogic unit 34 are generated to open switch S and close switch Sproducing the voltage and current waveshapes shown in FIG. 6. Thevoltage 2 is transferred from capacitor C to capacitor C causing acurrent i to flow through the control winding of the antenna saturablereactor L At time t the charge on capacitor C is com pletely transferredto capacitor C and a signal is received from logic unit 34 to openswitch S and close S The desired phase change is obtained by varying thefrequency of the transmitter RF output signal during the time intervalfrom t to t in accordance with the control current i. (One method ofchanging phase in a typical an antenna circuit including first andsecond reactance PSK system is to change the frequency from f to f andmeans, each reactance means having a pair of seriesback to f such thatwhen the frequency returns to f it V connected nonlinear saturablereactors, each of said has been shifted in phase with respect to thephase of f saturable reactors having a control winding and an prior tothe transition.) The control current i insures that output winding;

the antenna is tuned to the transmitter frequency through a feed forwardcircuit connected to said transmitter out the phase transition. Theswitching time means and to said first reactance means and including (4)10 a logic means operative in response to the trigger signal from saidtransmitter means to generate a sequence of switching signals, and aswitch circuit including generated when a predetermined change in theinformation signal takes place;

and, therefore, the maximum data rate, f becomes f (5) a first lowvoltage power supply having first 2 15 and second terminals, The phasecircuit of FIG. is symmetrical, therefore, ggggg g 223 23 3; fg gs g gwhen a phase change from phase 2 to phase 1 occurs the first and Secondterminal, sequence of the switching operation is reversed. said firstterminal being connected to the first Referring now to FIG. 7, a typicallogic unit 34 emterminal of Said first low voltage power ployed in theembodiment of FIG. 2 is shown. The logic Supply unit 34 includes aninput connection 7l which is coninductance means having one endConnected nected to a line 70, a complementary circu t 72, and a to theSecond terminal of said first 10w delay, r Complementary circuit 72 istypically a flipage power Supply and the other end flop and delay T1 18typically a o ie-shot multivibrator. 25 nected to the Second terminal ofSaid first Line 70 is connected to a control line 90. The output ofSwitching means, flip-flop 72 and output line 74 from delay 1 areconnected Said first Switching meeans being operative in to a secondcontrol line 92. second output line 76 from response to a switchingSignal from said delay 1- is connected to a third control line 94. Theinput logic unit to transfer energy from said first of delay 7'2 18 alsoconnected to the first output of delay low voltage power supply to saidinduct 7'1, via line 78. The first output of delay 1- is connected toance means the control line 94 and to the input of a delay 1'3 via linesa first capacitor having one end Connected 80 and 82, respectively. Thesecond output of the delay to the second terminal of said first 10W vo1t1' is connected to the control line 92 via line 84. First age powerSupply and having the other end and second outputs of delay T3 areconnected to the conconnected to the Common connection of trol lines 92and 90 via lines 86 and 8-8, respectively. Said first switching meansand Said induct The operation of logic unit 34 will be explained in ancemeans, conjunction with the current and voltage waveshapes of secondswitching means having a control line FIG. 8 and the switching circuitof FIG. 3. In response connected to said logic unit and having first toa trigger signal from transmitter 12, switch S which and secondterminals, said first terminal beis initially closed, is opened asindicated by the 1 on ing connected to the common connection of line 70.Simultaneously with the opening of switch 1, the said first switchingmeans, said inductance trigger signal activates complementary flip-flop72 (which means and said first capacitor, in turn supplies a controlsignal on line 92 to close switch a second capacitor having one endconnected S and starts the delay 71. These events occur at time to thesecond terminal of said first low t as indicated in FIG. 8. The currenti in L is transvoltage power supply and the other end ferred to L asshown in FIG. 8. At time t delay T1 not connected to the secod terminalof said only generates a first output signal which opens switch S secondswitching means and to said first via control line 92 and starts delay 1but also generates a terminal of the control circuit of said firstsecond output signal which closes the switch S via conreactance means,trol line 94. At this point, t the transmitter is transmitsaid secondswitching means being operative ting frequency f and the antenna istuned to that frein response to a switching signal from said quency. Attime 1 delay T2 not only generates a first outlogic unit to transferenergy from said first put signal which opens switch S via control line94 and capacitor to said second capacitor, initiates delay 1 via line 82but also generates a second third switching means having a control lineoutput signal which closes switch S via control line 92. connected tosaid logic unit and having first The current i stored in L is thentransferred back to inand second terminals, ductor L as indicated by thewave-shapes of FIG. 8. At said first terminal being connected to thetime i delay 7'3 produces a first output singal to open commonconnection of said second switchswitch S via control line 92 and asecond output signal ing means, said second capacitor and the to closeswitch S via control line 90. Note that delay 1' control circuit of saidfirst reactance means, is equal to delay T3 and is fixed by thecomponents in the a second low voltage power supply having a switchingcircuit. However, delay time 7'2 can be any value first terminalconnected to the second greater than delay time T terminal of said thirdswitching means and While a number of modifications to the broadbandhighhaving a second terminal connected to both Q antenna system havebeen suggested, it will be apparent the second terminal of the controlcircuit that many variations may be made by one skilled in the of saidfirst reactance means and the second art Without departing from thespirit of the invention. It terminal of said first low voltage power is,therefore, intended that the invention not be limited to supply,specifics of the foregoing description but rather to emsaid thirdswitching means being operative brace the full scope of the followingclaims. in response to a switching signal from said What is claimed is:logic unit to transfer energy from said sec- 1. A broadband high-Qantenna system comprising: ond low voltage power supply to the secondtransmitter means operative to generate an information capacitor; and

signal and a trigger signal, said trigger signal being a feedbackcircuit connected to said transmitter means 7 and to the secondreactance means of said antenna, said feedback circuit being operativeto sense the phase difference between the information signal from saidtransmitter means and the signal in said antenna and to generate acontrol signal in response to said phase difference to vary thereactance value of said second reactance means.

2. A broadband high-Q antenna system comprising:

transmitter means operative to generate an information signal and atrigger signal, said trigger signal being generated when a predeterminedchange in the information signal takes place;

an antenna circuit including first and second reactance means, eachhaving a pair of series-connected nonlinear saturable reactors, each ofsaid saturable reactors having a control winding and an output windafeed forward circuit connected to said transmitter means and to saidfirst reactance means and includa logic means operative in response tothe trigger signal from said transmitter means to generate a sequence ofswitching signals, and

a switch circuit including a first high voltage supply having first andsecond treminals,

a first switching means having a control line connected to said logicunit and having first and second terminals,

said first terminal being connected to the first terminal of said firsthigh voltage supply,

a first capacitor having one end connected to the second terminal ofsaid first high voltage power supply and having the other end connectedto the second terminal of said first switching means,

said first switching means being operative in response to a switchingsignal from said logic unit to transfer energy from said first highvoltage supply to said first capacitor,

second switching means having a control line connected to said logicunit and having first second terminals, the first terminal of saidsecond switching means being connected to the common connection of saidfirst switching means and said first capacitor and the second terminalof said second switching means being connected to the first terminal ofthe control winding of said first reactance means,

said second switching means being operative in response to a switchingsignal from said logic unit to transfer energy from said first capacitorto the control winding of said first reactance means whereby thereactance of the antenna is changed,

a second capacitor having one end connected to the second terminal ofthe control winding of said first reactance means and having the otherend of said capacitor connected to the second terminal of said firsthigh voltage supply,

third switching means having a control line connected to said logic unitand having first second terminals, the first terminal of said thirdswitching means being connected to the common connection of the secondterminal of the control winding of said first reactance means and saidsecond capacitor,

a second high voltage supply having first and second terminals, saidfirst terminal being connected to the second terminal of said first highvoltage supply, and the second terminal of said second high voltagesupply being connected to the second terminal of said third switchingmeans, and said third switching means being operative in response to aswitching signal from said logic unit to transfer energy from said highvoltage supply to said second capacitor; and a feedback circuitconnected to said transmitter means and to the second reactance means ofsaid antenna, said feedback circuit being operative to sense the phasedifference between the information signal from said transmitter meansand the signal in said antenna and to generate a control signal inresponse to said phase difference to vary the reactance value of saidsecond reactance means.

3. A broadband high-Q antenna system according to claim 2 wherein thelogic unit comprises:

an input terminal connected to said transmitter means and operative toreceive said trigger signal;

a plurality of output terminals;

a first connection means connected between said input terminal and afirst terminal of said plurality of output terminals whereby saidtrigger signal constitutes a first switching signal;

a flip-flop circuit having an input connected to said input terminal andan output connected to a second terminal of said plurality of outputterminals, said flip-flop being operative in response to the triggersignal of said transmitter to generate a second switching signal;

first delay means having an input connected to said input terminal and afirst output connected to said second terminal and a second outputconnected to a third terminal of said plurality of output terminals,said first delay being operative in response to the trigger signal fromsaid transmitter means to generate third and fourth switching signals atsaid second and third output terminals respectively;

second delay means having an input connected to the first output of saidfirst delay means and a first output connected to said third outputterminal and a second output connected to said second output terminal,said second delay means being operative in response to said thirdswitching signal to generate fifth and sixth switching signals at thesecond and third output terminals respectively of said plurality ofoutput terminals; and

third delay means having an input connected to the first output of saidsecond delay means and having a first output connected to the secondterminal of said plurality of output terminals and a second outputconnected to the first terminal of said plurality of output terminals,said third delay means being operative in response to said fifthswitching signal to generate seventh and eighth switching signals at thesecond and first output terminals respectively of said plurality ofoutput terminals.

4. A broadband high-Q antenna system according to claim 1 wherein thelogic unit comprises:

an input terminal connected to said transmitter means and operative toreceive said trigger signal;

a plurality of output terminals;

a first connection means connection between said input terminal and afirst terminal of said plurality of output terminals whereby saidtrigger signal constitutes a first switching signal;

a flip-flop circuit having an input connected to said input terminal andan output connected to a second terminal of said plurality of outputterminals, said flip-flop being operative in response to the triggersignal of said transmitter to generate a second switching signal;

first delay means having an input connected to said input terminal and afirst output connected to said second terminal and a second outputconnected to a third terminal of said plurality of output terminals,said first delay being operative in response to the trigger signal fromsaid transmitter means to generate third and fourth switching signals atsaid second and third output terminals respectively;

cond delay means having an input connected to the first output of saidfirst delay means and a first output connected to said third outputterminal and a second output connected to said second output terminal,said second delay means being operative in response to said thirdswitching signal to generate fifth and sixth switching signals at thesecond and third output terminals respectively of said plurality ofoutput terminals; and

ird delay means having an input connected to the first output of saidsecond delay means and having a first output connected to the secondterminal of said plurality of output terminals and a second outputconnected to the first terminal of said plurality of output terminals,said third delay means being operative in response to said fifthswitching signal to generate seventh and eighth switching signals at thesecond and first output terminals respectively of said plurality ofoutput terminals.

References Cited ROBERT L. GRIFFIN, Primary Examiner A. H. HANDAL,Assistant Examiner "H050 UNITED STATES PATENT OFFICE CERTIFICATE OFCORRECTION Patent N 3, 566,273 Dated February 23, 1971 Inventor(s) PaulR. Johannessen It is certified that error appears in theabove-identified patent and that said Letters Patent are herebycorrected as shown below:

Column 1 (Heading), Line 4, insert the following informatior concerningthe assignee after inventor's name and address:

assignor to Sylvania Electric Products Inc., a corporation c DelawareSigned and sealed this 16th day of November 1971.

(SEAL) Attest:

EDWARD M.FLETCHER,JR. ROBERT GOT'I'SCHALK Attesting Officer ActingCommissioner of Pat

